Consider a system with a two-level paging scheme in which a regular memory access takes 150 nanoseconds, and servicing a page fault takes 8 milliseconds. An average instruction takes 100 nanoseconds of CPU time, and two memory accesses. The TLB hit ratio is 90%, and the page fault rate is one in every 10,000 instructions. What is the effective average instruction execution time?
(A) 645 nanoseconds
(B) 1050 nanoseconds
(C) 1215 nanoseconds
(D) 1230 nanoseconds
Average Instruction execution time
= Average CPU execution time + Average memory access time for each instruction
= Average CPU execution time + Average address translation time + Average memory fetch for each instruction + Average page fault time for each instruction
= 100 + (0.9 * 0) + 0.1 * (2 * 150) + 2*150 + (1/10000) * 8 * 1000 [ TLB access time assumed as 0 and 2 page tables needs to be accessed in case of TLB miss as the system uses two-level paging]
= 100 + 30 + 300 + 800
= 1230 ns
Consider a system with a two-level paging scheme in which a regular memory access takes 150 nanoseconds, and servicing a page fault takes 8 milliseconds. An average instruction takes 100 nanoseconds of CPU time, and two memory accesses. The TLB hit ratio is 90%, and the page fault rate is one in every 10,000 instructions. What is the effective average instruction execution time?
(A) 645 nanoseconds
(B) 1050 nanoseconds
(C) 1215 nanoseconds
(D) 1230 nanoseconds
Average Instruction execution time
= Average CPU execution time + Average memory access time for each instruction
= Average CPU execution time + Average address translation time + Average memory fetch for each instruction + Average page fault time for each instruction
= 100 + (0.9 * 0) + 0.1 * (2 * 150) + 2*150 + (1/10000) * 8 * 1000 [ TLB access time assumed as 0 and 2 page tables needs to be accessed in case of TLB miss as the system uses two-level paging]
= 100 + 30 + 300 + 800
= 1230 ns
GATECSE